Very large computers or information handling systems, more commonly known as supercomputers, of the type manufactured by Cray Research, Inc., the assignee of the present invention, are constructed of a huge number of integrated circuit chips for both processing and memory. These integrated circuit chips are placed on printed circuit boards and all these printed circuit boards are interconnected closely together in order to increase the processing speed of these supercomputers. The more closely these various printed circuit boards are placed the less delay caused by the time it takes various electrical signals to pass over the conductive paths formed between the printed circuit boards. Even though electrical signals travel extremely fast at approximately one nanosecond per foot of length traveled, long electrical path lengths result in extra clocking cycles. In a supercomputer, such delays can result in noticeable performance problems.
In the past Cray Research, Inc. designed a system that provided short connection paths between printed circuit boards populated with central processing integrated circuits and printed circuit boards populated with memory integrated circuits. The prior system had a problem in that the interconnections were not made reliably. In a supercomputer, hundreds of thousands of electrical contacts must be made. Because of the shear number of connections it was difficult to get boards plugged and aligned with good contacts in the available computer checkout time. It was also difficult to replace boards in the field in an acceptable time frame. Correcting opens therefore requires a trip by service technician to locate and fix the problem.
As a result, there is a need for a supercomputer having an interconnection system that makes more reliable connections. More specifically, there is a need for an interconnection system that accurately spaces the edge connectors without limiting contact force for the contacts and also has a mechanism that eliminates any play between components. There is a further need for a supercomputer that has a high density interconnect apparatus for connecting a plurality of central processing boards, a plurality of network boards, and a plurality of common memory boards in a close configuration to improve the performance of the supercomputer.